PMEvo: Portable Inference of Port Mappings for Out-of-Order Processors by Evolutionary Optimization
Achieving peak performance in a computer system requires optimizations in every layer of the system, be it hardware or software. A detailed understanding of the underlying hardware, and especially the processor, is crucial to optimize software. One key criterion for the performance of a processor is its ability to exploit instruction-level parallelism. This ability is determined by the port mapping of the processor, which describes the execution units of the processor for each instruction.
Processor manufacturers usually do not share the port mappings of their microarchitectures. While approaches to automatically infer port mappings from experiments exist, they are based on processor-specific hardware performance counters that are not available on every platform.
We present PMEvo, a framework to automatically infer port mappings solely based on the measurement of the execution time of short instruction sequences. PMEvo uses an evolutionary algorithm that evaluates the fitness of candidate mappings with an analytical throughput model formulated as a linear program. Our prototype implementation infers a port mapping for Intel's Skylake architecture that predicts measured instruction throughput with an accuracy that is competitive to existing work. Furthermore, it finds port mappings for AMD's Zen+ architecture and the ARM Cortex-A72 architecture, which are out of scope of existing techniques.
Thu 18 Jun Times are displayed in time zone: (GMT-07:00) Pacific Time (US & Canada) change
|06:20 - 06:40|
|06:40 - 07:00|
|07:00 - 07:20|
Youwei ZhuoUniversity of Southern California, USA, Jingji ChenUniversity of Southern California, USA, Qinyi LuoUniversity of Southern California, USA, Yanzhi WangNortheastern University, USA, Hailong YangBeihang University, China, Depei QianBeihang University, China, Xuehai QianUniversity of Southern California, USA
|07:20 - 07:40|
Sotiris ApostolakisPrinceton University, USA, Ziyang XuPrinceton University, USA, Zujun TanPrinceton University, USA, Greg ChanPrinceton University, USA, Simone CampanoniNorthwestern University, USA, David I. AugustPrinceton University, USADOI Pre-print Media Attached