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PLDI 2020
Mon 15 - Fri 19 June 2020
Syed Asad Alam

Registered user since Thu 7 May 2020

Name: Syed Asad Alam

Bio: Researcher with focus on optimization and efficient mapping and implementation of digital systems comprising digital signal processing and communication algorithms. Varied experience in both verification and design with different start-up companies. Experience of working on multimedia processors, communication and networking devices and SOC bus design. Part of Multiple teams while working on FPGA based design and Integrated Circuit Design. Worked on Filters, Wireless communication System, frequency multipliers and Design of DSP Processors.

Completed my Bachelors in Computer and Information Systems Engineering from N.E.D. University of Engineering and Technology, Karachi, Pakistan before pursuing M.Sc. in Electrical Engineering with specialization in System-on-Chip Design and PhD in Electrical Engineering (Computer Engineering/Electronics Systems) from Linköping University, Sweden.

Currently working as a Post-Doctoral Research Fellow in the School of Computer Science and Statistics, Trinity College Dublin, The University of Dublin.

Country: Ireland

Affiliation: The University of Dublin

Personal website: https://www.scss.tcd.ie/~alams/

Research interests: Machine Learning, Embedded Systems, Quantization, Logarithmic Number Systems, Neural Networks, FPGAs, ASICs, Digital Signal Processing


LCTES 2020Author of WIP: Beyond Base-2 Logarithmic Number Systems within the LCTES 2020-track
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