Predictable Accelerator Design with Time-Sensitive Affine Types
Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by compiling C or C++ to accelerator designs. Repurposing legacy software languages, however, requires complex heuristics to map imperative code onto hardware structures. We find that the black-box heuristics in HLS can be unpredictable: changing parameters in the program that should improve performance can counterintuitively yield slower and larger designs. This paper proposes a type system that restricts HLS to programs that can predictably compile to hardware accelerators. The key idea is to model consumable hardware resources with a time-sensitive affine type system that prevents simultaneous uses of the same hardware structure. We implement the type system in Dahlia, a language that compiles to HLS C++, and show that it can reduce the size of HLS parameter spaces while accepting Pareto-optimal designs.
Thu 18 JunDisplayed time zone: Pacific Time (US & Canada) change
09:20 - 10:20 | Type SystemsPLDI Research Papers at PLDI Research Papers live stream Chair(s): Arjun Guha Northeastern University | ||
09:20 20mTalk | Predictable Accelerator Design with Time-Sensitive Affine Types PLDI Research Papers Rachit Nigam Cornell University, USA, Sachille Atapattu Cornell University, USA, Samuel Thomas Cornell University, USA, Zhijing Li Cornell University, USA, Theodore Bauer Cornell University, USA, Yuwei Ye Cornell University, USA, Apurva Koti Cornell University, USA, Adrian Sampson Cornell University, USA, Zhiru Zhang Cornell University, USA | ||
09:40 20mTalk | Type-Directed Scheduling of Streaming Accelerators PLDI Research Papers David Durst Stanford University, USA, Matthew Feldman Stanford University, USA, Dillon Huff Stanford University, USA, David Akeley University of California at Los Angeles, USA, Ross Daly Stanford University, USA, Gilbert Bernstein University of California at Berkeley, USA, Marco Patrignani Stanford University, USA / CISPA, Germany, Kayvon Fatahalian Stanford University, USA, Pat Hanrahan Stanford University, USA | ||
10:00 20mTalk | FreezeML: Complete and Easy Type Inference for First-Class Polymorphism PLDI Research Papers Frank Emrich University of Edinburgh, UK, Sam Lindley Heriot-Watt University, UK / The University of Edinburgh, UK / Imperial College London, UK, Jan Stolarek University of Edinburgh, UK, James Cheney University of Edinburgh, UK, Jonathan Coates University of Edinburgh, UK | ||