LLHD: A Multi-level Intermediate Representation for Hardware Description Languages
Modern Hardware Description Languages (HDLs) such as SystemVerilog or VHDL are, due to their sheer complexity, insufficient to transport designs through modern circuit design flows. Instead, each design automation tool lowers HDLs to its own Intermediate Representation (IR). These tools are monolithic and mostly proprietary, disagree in their implementation of HDLs, and while many redundant IRs exists, no IR today can be used through the entire circuit design flow. To solve this problem, we propose the LLHD multi-level IR. LLHD is designed as simple, unambiguous reference description of a digital circuit, yet fully captures existing HDLs. We show this with our reference compiler on designs as complex as full CPU cores. LLHD comes with lowering passes to a hardware-near structural IR, which readily integrates with existing tools. LLHD establishes the basis for innovation in HDLs and tools without redundant compilers or disjoint IRs. For instance, we implement an LLHD simulator that runs up to $2.4\times$ faster than commercial simulators but produces equivalent, cycle-accurate results. An initial vertically-integrated research prototype is capable of representing all levels of the IR, implements lowering from the behavioural to the structural IR, and covers a sufficient subset of SystemVerilog to support a full CPU design.
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14:20 - 15:40: Language Design IPLDI Research Papers at PLDI Research Papers live stream Chair(s): Adrian SampsonCornell University, USA | |||
14:20 - 14:40 Talk | Silq: A High-Level Quantum Language with Safe Uncomputation and Intuitive Semantics PLDI Research Papers Benjamin BichselETH Zurich, Switzerland, Maximilian BaaderETH Zurich, Switzerland, Timon GehrETH Zurich, Switzerland, Martin VechevETH Zurich, Switzerland | ||
14:40 - 15:00 Talk | The Essence of Bluespec: A Core Language for Rule-Based Hardware Design PLDI Research Papers Thomas BourgeatMassachusetts Institute of Technology, USA, Clément Pit-ClaudelMassachusetts Institute of Technology, USA, Adam ChlipalaMassachusetts Institute of Technology, ArvindMassachusetts Institute of Technology, USA | ||
15:00 - 15:20 Talk | LLHD: A Multi-level Intermediate Representation for Hardware Description Languages PLDI Research Papers Fabian SchuikiETH Zurich, Switzerland, Andreas KurthETH Zurich, Switzerland, Tobias GrosserETH Zurich, Switzerland, Luca BeniniETH Zurich, Switzerland Link to publication Pre-print | ||
15:20 - 15:40 Talk | On the Principles of Differentiable Quantum Programming Languages PLDI Research Papers Shaopeng ZhuUniversity of Maryland, USA, Shih-Han HungUniversity of Maryland, USA, Shouvanik ChakrabartiUniversity of Maryland, USA, Xiaodi WuUniversity of Maryland, USA |